[EDA] 布线自动设定线宽
1- 设计-设计规则-规则管理-物理-导线-新建一个-设定线宽
2.(可以忽略)在pcb-侧边栏-网络类-新建下
规下类
3.设计-设计规则-网络规则-物理-导线-右侧选择规则 PWR
- ALT+W 可以看到规则自动生效

1- 设计-设计规则-规则管理-物理-导线-新建一个-设定线宽
2.(可以忽略)在pcb-侧边栏-网络类-新建下
规下类
3.设计-设计规则-网络规则-物理-导线-右侧选择规则 PWR

又开了一瓶53的粮食酒,好上头
这几天
不知不觉喝了两瓶了
编排
networks:
1panel-network:
external: trueservices:
postgresql:
container_name: ${CONTAINER_NAME}
deploy:
resources:
limits:
cpus: ${CPUS}
memory: ${MEMORY_LIMIT}
environment:
- POSTGRES_USER=${PANEL_DB_ROOT_USER}
- POSTGRES_PASSWORD=${PANEL_DB_ROOT_PASSWORD}
healthcheck:
interval: 30s
retries: 5
start_period: 20s
test:
- CMD
- pg_isready
- -h
- 127.0.0.1
- -p
- "5432"
- -q
- -U
- ${PANEL_DB_ROOT_USER}
timeout: 5s
image: pgvector/pgvector:0.8.2-pg18-trixie
labels:
createdBy: Apps
networks:
- 1panel-network
ports:
- ${HOST_IP}:${PANEL_APP_PORT_HTTP}:5432
restart: always
volumes:
- ./data:/var/lib/postgresql
最主要的是 image: pgvector/pgvector:0.8.2-pg18-trixie
https://hub.docker.com/r/pgvector/pgvector/tags
可通过 pgvector 做统一 RAG 记忆